Solving the third-shift problem in ic piracy with test-aware logic locking.

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IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 2015 Jun;34(6):961-71. doi: 10.1109/TCAD.2015.2404876

Solving the third-shift problem in ic piracy with test-aware logic locking. Scientific Computing Software

Plaza SM, Markov IL

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Abstract

The increasing IC manufacturing cost encourages a business model where design houses outsource IC fabrication to remote foundries. Despite cost savings, this model exposes design houses to IC piracy as remote foundries can manufacture in excess to sell on the black market. Recent efforts in digital hardware security aim to thwart piracy by using XOR-based chip locking, cryptography, and active metering. To counter direct attacks and lower the exposure of unlocked circuits to the foundry, we introduce a multiplexor-based locking strategy that preserves test response allowing IC testing by an untrusted party before activation. We demonstrate a simple yet effective attack against a locked circuit that does not preserve test response, and validate the effectiveness of our locking strategy on IWLS 2005 benchmarks.

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Solving the third-shift problem in ic piracy with test-aware logic locking.

Abstract

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